Low-power “Bobcat” and high-performance “Bulldozer” pave the way to upcoming CPU and AMD Fusion APU designs
AMD revealed new details on its two next-generation x86 core processor implementations, including AMDs unique approach to high-performance, multi-threaded computing, as well as a sub one-watt capable low-power design. The two new designs, codenamed “Bulldozer” for high-performance PC and server markets, and “Bobcat” for low-power notebook and small form-factor desktop markets, were designed from the ground-up to address specific customer requirements and compute workloads. The new cores are central to AMD’s future roadmap, including the AMD Fusion Accelerated Processing Unit (APU) products and AMD’s new high-performance server and client CPUs.
“In my opinion, Bulldozer and Bobcat are not only two of the greatest technical achievements in AMD’s rich history, but two of the most important for the industry as well,” said Chekib Akrout, senior vice president and general manager, AMD Technology Development. “With CPUs and APUs built from these core implementations, we expect our customers to deliver a new wave of innovative PC form factors and high-performance computing experiences.”
At HOT CHIPS 22, Brad Burgess, AMD Fellow and chief architect of Bobcat, and Mike Butler, AMD Fellow and chief architect of Bulldozer, will each present in the “New Processor Architectures” session. The x86 architecture lies at the very heart of computing and AMD has continuously evolved and improved its core designs. The Bulldozer and Bobcat cores continue that evolutionary path and are designed to change the user’s experience with the resulting products.
“Attacking both high-performance and low-power markets simultaneously with two brand new architectures is an impressive accomplishment that serves notice to the industry that innovation is alive and well inside AMD,” observed Nathan Brookwood, research fellow at Insight 64.
Highlights of the new cores include:
- An innovative approach to multithreaded compute performance that
balances dedicated and shared compute resources to provide a highly
compact, high core count design that is easily replicated on a chip for
- New x86 instruction support (SSE4.1, SSE4.2, AVX, and XOP
including 4-operand FMAC)
- Advanced power management features
- Manufactured on advanced 32nm process technology
- Sub-one-watt capable operation
- Out-of-order instruction execution for higher performance
- Estimated 90 percent of today’s mainstream PC performance in
half the area
- Core power gating and a microarchitecture optimized for low
- Highly synthesizeable design that moves easily across