Ajay Bhatt and Ramin Neshati, who work at the Intel Corporation, divulged architectural extensions for PCIe II, with products expected in 2007-2008.
Features for PCI Express II include better formance at 5GHz PHY, device virtualisation, trusted platforms, and different sizes – or form factors as the jargon goes.
Luckily, you won’t have to throw the baby out with the bathwater, because PCIe II will be compatible with PCIe 1.x, using the same power budget and the same clocking architecture. But the silicon cost will be cheaper, and so will the clocks.
Intel discovered that systems are constrained by jitter and not voltage margins, and hitting the “jitter budget” is a fundamental requirement for version 2.0. Five GHz devices have to operate at 2.5GT/s or 5.0GT/s. and the transmitter, receiver, reference clock and channel must all be 5GHz capable to get to that kind of performance.
The virtualisation feature will allow multiple OSes to run simultaneously and share the platform hardware resources, effectively sharing PCI Express devices.
OS improvements can lead to increased IO attacks on systems, so PCIe II will try and include better trusted computing. There will be a trusted configuration space, and a trusted configuration access mechanism will be included with modifications to the trusted platform module (TPM) to enable that.