Why AMD 65 nanometre parts clock low

ONE OF THE great unanswered questions in the CPU industry is what happened to AMD’s 65 nanometre CPUs.

The answer is quite simple, but the background to understanding that simple answer is a long and convoluted story.

Let’s dive in with a little history. The last generation 90 nanometre AMD CPUs are in the K8 family, and they are collectively called Rev F on socket AM2 and sport DDR2 on the A64 side, socket 1207 on the Opteron side. They come in both 512K (x2) and 1M (x2) caches, are readily available, and in general, made up the mainstay of the AMD lineup for the second half of last year.

The plan on the A64 side was to release a Rev G, aka 65nm K8 on AM2 and then move to K10h, aka Barcelona, as that core ramped. The first K10h parts would obviously go to server duty, and then the parts would trickle down as demand was met.

On the Opteron front, things were a bit different. Since 65nm came out late, very late, in Q4, and at the time Barcelona was due in late Q2/07, that gave any 65nm Opteron a shelf life of about six months. Server vendors like predictability and long lives and six months is not a long life. It was deemed not really worth it to do a 65nm Opteron with 1MB caches, it would be replaced in short order, and 90nm parts would be enough yp see them through.

The decision was made then to only do a 65nm die with 512K cache. As Barcelona ramped up, 90nm/1M would be wound down, and all would be happy.

At this point, we know reality intruded and K10h was not launched a quarter ago. This meant the window between 65nm introduction and Barcelona introduction slipped from six months to 10 and counting, realistically a year before things get fully rolling. In hindsight, there was more than enough time for a Rev G on 1207/65nm Opteron, but no die was taped out with a 1MB cache, plan B was to suck it down.

So, AMD had to continue 90nm production in order to fill demand for Opterons, and could not wind that down that process as quickly as it wanted. Barcelona was not done, much less not ramping.

Also, the speed differences between 65nm and 90nm parts with similar caches is somewhere between minimal and none. There are some power savings, but in the end, the most quantifiable difference is that AMD make higher margins on 65 due to smaller dice.

AMD was making 65nm parts with 512K cache all day long, and that was going well. The lower cache parts took up the low end of the food chain and consequently are lower clocked.

On the higher end, Opterons are forcing AMD to keep the 90nm lines open. The process is known, the yields are high, and so are the bin splits. The fab and equipment are paid for, and the chips are pretty cheap to make all told.

If AMD were to clock up the 512K parts above the 2.6 it is at now, it would take a speed hit when compared to a 90nm 1MB part at the same clock. There is no 65nm 1MB part, so that is simply not an option, and by the time AMD realised how big the Barcelona delay was, there was not time to make one.

So, AMD is doing what it can, using the dice available in the best way it can. Pushing 65nm faster would mean a net performance loss for the consumer with a slight wattage savings. Without having access to AMDs full cost structure, it is hard to say if it is cheaper to make a 90nm 1MB part or an emergency taped out 65nm 1MH part once everything is taken into account.

But 65nm yields are good, AMD can make faster parts, but it would not make economic sense. There is no 65nm 1MB component, so why crank up 65nm 512K speeds for a quantifiable clock for clock performance loss at potentially no cost savings to AMD?

While upping 65nm speeds are possible, without Barcelona, it doesn’t make sense. Barcelona is late, it screwed up AMD’s plans, and 65nm was one of the victims.

News source: THEINQUIRER


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